In digital electronic systems, it is frequently desirable to generate a binary logic signal that is delayed with respect to the transition of another logic signal. The delay line is a circuit commonly used for this purpose in memory systems. Presently available delay lines are typically hybrid modules which use discrete or thick-film inductors and capacitors as the primary elements for controlling the time delay of each delay stage in a multi-stage delay line. An appropriate combination of discrete or thick-film inductors and capacitors can provide reasonably accurate time delays, but the cost and reliability advantages of monolithic integrated circuits are well known. Under the present state of the art, however, inductors having practical inductance values cannot economically be fabricated in a monolithic integrated circuit.
In addition to use within hybrid delay line modules, delay stages are also commonly utilized in monolithic integrated circuits, especially in memory integrated circuits, to delay one signal within the integrated circuit with respect to another. Such delay stages are generally implemented with simple inverters or strings of inverters. The time delay of such circuits normally results from the time required to charge or discharge capacitance through a resistive element such as a resistor or an MOS transistor. Due to processing variations in the fabrication of integrated circuits in semiconductor wafers, the time delay of delay stages from one integrated circuit to another may vary considerably, especially from wafer to wafer. Nevertheless, in the usual circumstance, no provision is made for adjusting the delay of a delay stage after the monolithic integrated circuit has been fabricated to be electrically functional.
Among the elements utilized in the present invention are laser-fusible links. A laser-fusible link is a conductive element that can readily be open circuited by exposing the link to a laser beam.
In monolithic integrated circuits, laser-fusible links are typically fabricated of polysilicon and are widely used in random access memory integrated circuits for substituting redundant memory cells in place of defective cells. In such an application, laser-fusible links are blown to disconnect defective memory cells from the memory matrix while other laser-fusible links are blown to enable spare address decoders for the redundant memory cells.
In accordance with the foregoing, a need exists for a delay stage or circuit which (1) can be fabricated in a monolithic integrated circuit and (2) can conveniently and accurately have its delay adjusted subsequent to fabrication of the integrated circuit. A need also exists for a method for economically adjusting the delay of each of many delay circuits of like type which may be batch processed and embodied in a semiconductor wafer.